Accumulator

An investigation into the behaviour of the Yamaha OPL3 chipset.
With a view to a more accurate emulator

Accumulator

Postby carbon14 » Wed Jun 22, 2011 3:00 pm

Matthew Gambrell and Olli Niemitalo have suggested that the OPL2 may use floating point arithmetic internally.

I am now confident that the OPL3 does not. The accumulation of waveforms easily produces output with 12 or more significant binary digits. This precision would be lost within a 11/3 floating point accumulator. Each operator certainly produces 11/3 output, it cannot do anything else because the final lookup table has only 10 bits. The result is an 11 bit value which is shifted by it's exponent. But a floating point accumulator of the same dimensions could not produce an output with more than 11 significant digits. This strongly suggests to me that the internals of the OPL3 are at least 16 bits wide.

The accompanying DAC takes a 16 bit input, and internally renders that with 11 bit precision. But with a full 16-bit precision output, one could presumably use a true 16 bit DAC if one wanted to. Just because Yamaha saw fit to produce a cheaper and more practical floating point DAC doesn't force anyone to use it.

The OPL2 is currently outside of the scope of this project, but it uses the same lookup tables, and it DOES output a floating point value. It's not capable of outputting the precision of the OPL3, but that's not a significant issue for audio purposes.

I'm thinking that it may be possible to test the OPL2 floating point accumulator hypothesis by summing combinations of large and small waveforms. It seems to me that this would introduce small but detectable rounding errors, and furthermore that those rounding errors would vary according to the order in which the large and small waveforms were summed. By swapping the waveforms between operators, you could deliberately vary the order of summing (even if you were not sure what that order was.) and it would be possible to detect the rounding errors or lack of them.
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Re: Accumulator

Postby carbon14 » Tue Jul 03, 2012 12:28 pm

The last experiments that I wish to do in phase 2 of my project are to do with the accumulator.

1. What kind of clamping goes on with the accumulator. It's possible to sum all 36 operators and acheive wave amplitudes more than 4 times greater than the permissible 32767. Presumably the accumulator is wider than 16 bits, and the results are clamped. By accumulating 10 square waves with slightly offset phases, I should be able to exceed the limits and to see the shape of the clipped wave to confirm this. Anything less than a 19 bit accumulator would suggest that artifacts could arise which would depend on the order in which the waves were accumulated.

2. At what point in a channels processing does accumulation take place. If a two-operator channel is set to FM, then the result of the first operator is passed to the phase generator of the second, and the second operator is accumulated. But if the channel is set to AM, then both operators are accumulated, does this happen in one hit, or does it (as seems more likely) happen one operator at a time. I propose to use a 4 operator channel in full AM mode, and to vary the output destinations from A to B and back again repeatedly. In the same way that I can set KON between the processing of operators, I suspect that I can change the output destination between operators. If the TL for the 4 operators are different, I expect to see a variety of output levels on destination A at the point of switching. A statistical analysis should then yield a timing diagram showing the relative times during a single sample period in which the 4 operators are accumulated.
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Re: Accumulator

Postby carbon14 » Tue Jul 03, 2012 8:08 pm

Experiment 1 as above.

10 operators in AM mode. each with a square wave and slightly offset phases.

The results were a clean clipping at 0 and 65535, with steps up and down as expected as the various waves changes state one after another

The set of values seen were
0
8256
24594
32763
40932
57270
65535

The somewhat out of place value 32763 would appear to be that the 3rd pair of operators were turned on between the two operators, so we get a single sample with two pairs in the low state, two pairs in the high state, and the remaining pair with one operator in each state.

The same set of values was seen in reverse as all the operators changed to the low state one after another.
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Re: Accumulator

Postby carbon14 » Tue Jul 03, 2012 8:16 pm

Experiment 2. as above.

This was interesting. Even in 4 operator mode, it appears that the output destinations in register C0 controls operators 1 and 2 while C3 continues to control operators 3 and 4. As a result, I couldn't acheive everything I wanted for this experiment, however I did get some good partial results. Using connection method 1/1 where operator 2 modulates operator 3 and the result is added to operators 1 and 4, by changing the output destination for operators 3 and 4.
If the output of the connection scheme was switched in one hit, I would expect to see the accumulated output of 1, 3 and 4 when the output was on, and just operator 1 when the output was off (I'm not changing the output for operator 1 at all). In addition I saw the accumulation of just 1 and 3 on 83 occasions out of 1000 and the accumulation of just 1 and 4 on 85 occasions out of 1000. These events occured for just 1 sample and suggest that the switching occured after operator 3 had gone to the first destination and before operator 4 had been routed.

83 occasions out of 1000 is 1/12 of the time. Operator 3 is in controlled by 28 and operator 4 is controlled by register 2B, they are 3 registers apart.

I therefore suggest that it is reasonable to assume that all 36 operators of the chip are processed in the order of their registers, with the result that the two operators in question are processed 1/12 of a sample cycle apart.
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